The present invention relates to a method of manufacturing a semiconductor device, for example, a technology suited for use in a method of manufacturing a semiconductor device having an interlayer insulating film.
A semiconductor device is manufactured by forming semiconductor elements such as MISFET on the main surface of a semiconductor substrate and then forming, on the main surface of the semiconductor substrate, a multilayer wiring structure comprised of a plurality of interlayer insulating films and a plurality of wiring layers.
Japanese Unexamined Patent Application Publication No. Hei 9(1997)-241518 (Patent Document 1) describes a technology of forming an insulating film by spin coating.
Japanese Unexamined Patent Application Publication No. Hei 9(1997)-161330 (Patent Document 2) describes a technology of applying a protective coating material to a surface by spraying and then, planarizing the applied surface by ultrasonic oscillation.
Japanese Unexamined Patent Application Publication No. Hei 8(1996)-330306 (Patent Document 3) describes a technology of planarizing the upper surface of a SOG film by a CMP treatment.